[LINUX:20588] RE: Ynt: Re: mail server kurmak istiyorum

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From: Burak DAYIOGLU (burak@yimpas.net.tr)
Date: Mon 16 Oct 2000 - 08:51:44 EEST


Hello,
I read the statements beginning with "Newest AMD 64Bit ...".

I read the technical statements that follow and couldn't be able to find
any conclusions. Did I miss the conclusion part or was it absent. I am
willing to hear the conclusion -just to plan better from now on-.

with best regards,
-bd

Andreas Mueller wrote:
>
> hi,
>
> > > You forget the most importent factor, how many user use the
> > > System/Services at the same time ?
> > >
> > Bandwidth'e ve zamana gore degisen seyler bunlar..
> >
>
> maybe there's a missunderstanding you can add 60.000 users a
> a intel based system, but the most importend question is
> how many users can connect to your system at the same moment/ at the same
> second.
>
> "Newest" AMD 64Bit Prozessors MircoProzessor send their datas to the
> SystemController with 64bit Data + 8bit ECC, 13Bit SADDOUT , 13Bit
> SADDIN, with 200MHz and max. 1.6Gb/sec Datas
> ( just a clever Idea to double to "Mhz" and double the Bit-rate from 32
> to 64 to get double bandwidth )
> So now the System Cotroller send his Datas to PCI-Bus ( 32 Bit ) Memory
> ( 64Bit ) that means this is a socalled "Bottleneck" to the PCI-Bus
> you get Datas from the MircoProzessor with 1.6Gb/sec but you Bus can
> handle only "800MB/sec". If you now using ISA, the datas are again bisects
> to half, from PCI-Bus to Periferal Bus Controller, to the ISA-Bus ( 16Bit
> ) Also importent are the channels. PC's have 1 Channel ( INPUT,OUTPUT )
> A RISC System has 1-30, with a Bandwidth of 3.2GB/sec 100Mhz ) of _EVERY_
> channel. Most Intel Pentiums are still 32Bit, with 100Mhz ( 133 ) that means
> Bandwidth of max. 800MB/sec. Thats still hight for a PC !
> PC-Industrie is still working at a 64Bit Architecture, to make this
> big performance little smaller. It takes some more Years.
>
> The Differences between CISC ( PC's ) and RISC ( IBM,SUN )
>
> CISC and RISC (Complex and Reduced Instruction set Computer,
> respectively) are dominant processor architecture paradigms. Computers
> of the two types are differentiated by the nature of the data
> processing instructions sets interpreted by their central processing
> units (CPUs). They both have advantages and drawbacks, which are
> detailed below. To improve performance, CISC systems try to reduce the number
> of instructions programms must call. To do this, they have large sets of
> microcode instructions that cover a broad range of tasks. A single
> microcode instruction, in turn, when translated in the CPU, may become
> several tasks the processor performs. As a consequence, instructions
> are of variable length and often require more than one clock cycle to
> complete.
>
> RISC systems, on the other hand, seek to improve performance by
> reducing the number of clock cycles required to perform tasks. They
> have small sets of simplified instructions, doing away with microcodes
> altogether in most cases. While this means that tasks require more
> instructions, instructions are all of the same length and usually
> require only one clock cycle to complete. Because of this, RISC
> systems are capable of processing instructions in parallel in a
> process called pipelining. The CPU works on more than one instruction
> at once by starting the second instruction before it completes the
> first one. This greatly increases throughput and makes RISC systems
> substantially faster than their CISC counterparts. RISC systems do
> have a few disadvantages, however. Notably, because programs usually
> have more instructions, compilers and applications written in assembly
> language are more difficult to build for RISC systems.
>
> Also see
> http://www.inf.fh-dortmund.de/person/prof/si/risc/intro_to_risc/irt0_index.html
> http://ciips.ee.uwa.edu.au/~morris/Courses/CA406/RISC_intro.html
>
> If you're more interested in a discussion about Systemarchitecture
> you're welcome to email me. I guess some people starting to disturb :)
>
> : so here some jave-code,
> import java.util.*;
>
> public class test {
>
> public static void main( String args[] ) {
> int threadCount = 1;
> Hashtable ht = new Hashtable();
> for(int i=1; i<=40000; i++ ){
> System.out.println("Creating thread # "+i);
> ht.put(Integer.toString(i), new myThread(i));
> }
> for(int i=1; i<=40000; i++ ){
> System.out.println("Starting thread # "+i);
> ((myThread)ht.get(Integer.toString(i))).start();
> }
> //while(true){
> Thread[] tarray = new
> Thread[Thread.activeCount()+10];
> int ThreadCount = Thread.enumerate( tarray );
> System.out.println( "\n\n\n Active Thread
> count: " + ThreadCount+ "\n\n\n" );
> //}
> }
> }
>
> amu
> --
>
> "The BeOS takes the best features from the major
> operating systems. It's got the power and flexibility
> of Unix, the interface and ease of use of the MacOS,
> and Minesweeper from Windows."
> ----------------------------------------------------------------------
> Public-gpg-Key: http://tr.debian.net/amu/amu.key
>
>
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